Computers operate on simple electrical signals: on or off, 1 or 0. This is great for counting, but what happens when we need to represent negative numbers? The most straightforward idea is to dedicate one bit to the sign. This approach is called Sign-Magnitude.

In an 8-bit system, we could use the first bit, the Most Significant Bit (MSB), as the sign flag: 0 for positive, 1 for negative. The remaining 7 bits would represent the number's absolute value, or magnitude. So, 00000101 would be +5, and 10000101 would be -5. It's simple and easy for humans to read.

But this simplicity hides a couple of serious problems. The first is the issue of zero.

Having two different patterns for the same value is wasteful and confusing. It forces the computer to constantly perform extra checks. If it compares a result to 00000000 and they don't match, does that mean the result isn't zero? Not necessarily. It might be 10000000.

The bigger problem arises when we try to do arithmetic. With sign-magnitude, you can't just add the bits together and expect the right answer. The hardware has to check the signs first.

• If the signs are the same, you add the magnitudes and keep the sign.
• If the signs are different, you must subtract the smaller magnitude from the larger one and take the sign of the larger number.

This requires separate, complex circuits for addition and subtraction. This makes the Arithmetic Logic Units (ALUs) in the processor more complicated, slower, and more expensive to build. The goal is always to create a single, unified circuit that can handle both positive and negative numbers seamlessly.

Designers tried another approach called One's complement. To get the negative of a number, you just flip all its bits. For example, +5 is 00000101. To get -5, you invert every bit to get 11111010.

This method has a neat property: subtraction can be done by adding the one's complement. To calculate 10 - 5, you can do 10 + (-5). This is a big improvement for hardware design. But it still has a fatal flaw: a dual zero.

Flipping all the bits in 00000000 gives 11111111. We're back to the same problem of two representations for zero. This ambiguity complicates logic and wastes a potential bit pattern.

These limitations of Sign-Magnitude and One's Complement created a need for a better system. We need a representation that has a single, unique zero and allows addition and subtraction to be handled by the same simple, elegant hardware. This is the problem that two's complement was designed to solve.